1. Field of the Invention
The present invention generally relates to the field of computer systems. More specifically, the present invention relates to features incorporated within a microprocessor that enable the microprocessor to enter and exit a reduced power consumption state during a System Management Mode operation.
2. Background of Related Art
Recent implementations of microprocessors have a System Management Mode (SMM) for supporting advanced power-reduction strategies in these microprocessors. SMM is a state in which the microprocessor is able to manage various components in the computer system, such as memory and other peripheral devices, and control the availability of these resources, in order to reduce power consumption in the computer system.
The microprocessor enters the system management mode upon being triggered by a system interrupt in the computer system, to cause the microprocessor to power down to enter the reduced power consumption state. The system interrupt comprises the assertion of electrical signals to the microprocessor. When in the reduced power consumption state, the functions of the microprocessor are limited since the microprocessor cannot operate at normal operating levels.
The microprocessor exits the reduced power consumption state on being triggered once again by an SMM exit interrupt. When the microprocessor exits the reduced power consumption state, the microprocessor continues executing instructions that were in the microprocessor's instruction pipelines prior to entering the reduced power consumption state.
Although the microprocessor is able to continue executing instructions in its instruction pipelines after exiting the reduced power consumption state, the transition to and from the reduced power consumption state can have an effect on the integrity of the instructions executed immediately after the microprocessor exits the reduced power consumption state.
When the microprocessor enters the reduced power consumption state, the current (I.sub.cc) levels in the processor drop as parts of the processor are powered down. When the processor is interrupted to exit the reduced power consumption state, there is a sudden change in the current levels in the processor as all parts of the processor are powered up and the current levels return to normal operating levels. For example, the current activity in the processor as it emerges from a reduced power consumption state may jump up to about four times the average current levels in a very short period of time, such as 10 ns for a 100 MHZ clock frequency.
The sudden rise in the current level as the processor emerges from the reduced power consumption state cause voltage fluctuations in the processor, which causes the voltage levels to exceed specifications and affect the performance of the processor. The voltage fluctuations in the processor are highest as the processor emerges from the reduced power consumption state. However, the voltage fluctuations dampen over time after the processor has completely exited the reduced power consumption state.
In the prior art, the processor continues to execute user instructions as soon as it is interrupted to exit the reduced power consumption state. The continued execution of instructions by the processor as it emerges from the reduced power consumption state often leads to the degradation in the integrity of the instructions being executed, as a result of the voltage fluctuations in the processor.
The degradation is due to the fact that the first few voltage fluctuations can cause the processor to run slower, which could result in timing failures during execution, which therefore hampers the processor's performance. Thus, a method of enabling a processor to enter and exit a reduced power consumption state without affecting instructions being executed in the processor is needed.
The present invention provides a method and apparatus for transitioning a processor in and out of a reduced power consumption state, such that the integrity of instructions being executed in the processor prior to entering the reduced power consumption state is maintained.